1. Field of the Invention
The present invention relates to a CMOS image sensor, and more particularly to a CMOS image sensor and method for manufacturing the same, in which a diffusion region of a photodiode is disposed apart from an isolation layer, and thereby a dark current is reduced.
2. Description of the Prior Art
In general, an image sensor is a semiconductor device for converting an optical image into an electrical signal, and is generally classified into a charge coupled device (CCD) and a complementary MOS (CMOS) image sensor.
The CCD is a device constructed in such a manner that each MOS capacitor is adjacently disposed to each other, and that charge carriers are stored on any one of the MOS capacitors and then transferred to another MOS capacitor next to the MOS capacitor that stores the charge carrier. The CCD has various disadvantages, such as a complicated drive mode, high power consumption, a complicated manufacturing process derived from a relatively high number of photolithographic process steps and so forth. Additionally, the CCD has a disadvantage in that it is difficult to make a product compact, due to difficulty in integrating various circuits such as a controlling circuit, a signal processing circuit, analog/digital converting circuit and so on into a chip for the CCD.
Currently, CMOS image sensors are attracting attention as a next generation image sensor for overcoming the disadvantages of the CCD. The CMOS image sensor is a device employing a switching mode based on MOS transistors formed in each of the unit pixels on a semiconductor substrate using CMOS technology, making use of a controlling circuit, a signal processing circuit and so on as periphery circuits, and sequentially detecting outputs of each unit pixel by means of the MOS transistors. That is, the CMOS image sensor sequentially detects electrical signals of each unit pixel in a switching mode to realize an image through formation of a photodiode and a MOS transistor within a unit pixel.
The CMOS image sensor has advantages such as low power consumption, a relatively simple manufacturing process resulting from a smaller number of photolithographic process steps and so on, because it makes use of CMOS manufacturing technology. In addition, the CMOS image sensor has an advantage in that it is easy to make a product compact by integration of a controlling circuit, a signal processing circuit, an analog/digital converting circuit, etc. into a chip for the CMOS image sensor. For this reason, the CMOS image sensor is presently broadly used in various applications, such as digital still cameras, digital video cameras and so forth.
FIG. 1 shows a circuit for a unit pixel of a general CMOS image sensor. As shown in FIG. 1, the unit pixel 100 of the CMOS image sensor includes a photodiode 110 as a photoelectric transformation section and four transistors. Each of the four transistors is a transfer transistor 120, a reset transistor 130, a drive transistor 140 and a select transistor 150. An output terminal OUT of the unit pixel 100 is connected with a load transistor 160. Herein, a reference numeral FD is a floating diffusion region, a reference numeral Tx is gate voltage of the transfer transistor 120, a reference numeral Rx is gate voltage of the reset transistor 130, a reference numeral Dx is gate voltage of the drive transistor 140, and a reference numeral Sx is gate voltage of the select transistor 150.
FIG. 2 shows a layout of a unit pixel of the conventional CMOS image sensor. As shown in FIG. 2, in the unit pixel 100, an active region is a region defined by a bold solid line and an isolation region is a region outside the active region in which an isolation layer (not shown) is formed. The gates 123, 133, 143 and 153, respectively of the transfer transistor 120, reset transistor 130, drive transistor 140 and select transistor 150 are disposed as to be across an upper portion of the active region. The reference numeral FD is a floating diffusion region and the reference numeral PD is a photodiode portion.
FIG. 3 is a structural cross-sectional view showing the photodiode portion of the unit pixel taken along a line A-A of FIG. 2. As shown in FIG. 3, a P− type epitaxial layer 11 is formed on a P++ type semiconductor substrate 10. To define an active region of the semiconductor substrate 10, an isolation layer 13 is formed on a portion of the epitaxial layer 11 for an isolation region of the semiconductor substrate 10. An n− type diffusion region 111 and a Po type diffusion region 113 of the photodiode PD are formed on a portion of the epitaxial layer 11 for a photodiode region of the active region, the Po type diffusion region 113 being positioned on the n− type diffusion region 111.
The conventional CMOS image sensor 100 with such construction may suffer from degradations of device performance and electric charge storing capacity, due to an increase of dark current.
Dark current is generated by electrons transferred to the floating diffusion region from the photodiode in a state where light is not yet incident to the photodiode. It has been reported that dark current has been caused generally from various kinds of defects, such as a dangling bond and so forth, on a neighboring portion adjacent to the surface of the semiconductor substrate, a boundary portion of the isolation layer and the Po type diffusion region, a boundary portion of the isolation layer and the n− type diffusion region, and/or a boundary portion of the Po type diffusion region and the n− type diffusion region. Dark current may cause considerable problems such as degradations of performance and electric charge storing capacity in the CMOS image sensor under low illumination conditions.
Accordingly, the conventional CMOS image sensor has used both the PO type diffusion region and the n− type diffusion region for the photodiode in order to reduce dark current generated especially from the neighboring portion adjacent to the surface of a silicon substrate. However, the conventional CMOS image sensor has been greatly affected by dark current generated at the boundary portions of the isolation region and the Po type diffusion region, and the Po type diffusion region the n− type diffusion region.
More particularly, as shown in FIG. 3, when patterns (not shown) of a photoresist as a mask layer against an ion implantation for forming the n− type diffusion region 111 and the Po type diffusion region 113 of the photodiode PD is formed on the semiconductor substrate 10, the whole active region for the photodiode PD is exposed in an opening of the photoresist patterns. In such state, when impurities for the n− type diffusion region 111 and the Po type diffusion region 113 are ion-implanted in the active region of the photodiode PD, the impurities for the n− type diffusion region 111 and the Po type diffusion region 113 are also ion-implanted to the boundary portion between the active region and the isolation layer 13 of the photodiode PD.
Thus, damages by the ion implantation of impurities are caused at the boundary portion between the n−/Po type diffusion regions 111 and 113 and the isolation layer 13, further generating defects. The defects can cause a generation of electric charge or hole carriers, and also provide places for recombination of the electric charges and the holes. Consequently, such defects can increase leakage current of the photodiode and therefore dark current of the CMOS image sensor.
As described above, the conventional CMOS image sensor has a construction in which impurities for forming the diffusion region of the photodiode are also ion-implanted on the boundary portion between the isolation layer and the active region for the photodiode when the impurities are ion-implanted for forming the diffusion region of the photodiode. Thus, the conventional CMOS image sensor has a limit in increasing performance characteristics of the device because it is difficult to restrict dark current generated at the boundary portion between the isolation layer and the active region for the photodiode, and to maintain device characteristics between the pixels constant.
Meanwhile, Korean Laid-Open Patent Publication Nos. 2001-61349, 2001-61353 and 2003-52639 disclose a method for reducing dark current of CMOS image sensor, which, however, do not present a solution to restrict an increase of dark current by preventing impurities from being ion-implanted to the boundary portion between an isolation layer and an active region for a photodiode.
Also, U.S. Pat. No. 6,462,365, entitled “Active Pixel Having Reduced Dark Current in a CMOS Image Sensor,” discloses a method for restricting an increase of dark current due to a dangling bond at the surface of a photodiode, in which an isolation layer and a transfer gate as a passivation layer are formed on the surface of the photodiode. However, the method also does not restrict an increase of dark current by preventing impurities from being ion-implanted to the boundary portion between the isolation layer and the active region for the photodiode.